1. Field of the Invention
The present invention relates to access to an input/output device connected to an electronic device including a computer or the like. More particularly, the present invention relates to a method and apparatus for detecting an error of an access wait signal transmitted to an electronic device from an input/output device.
2. Description of the Related Art
As used herein, an electronic device includes a computer, a printer or, in addition, any other electronic device provided with an input/output (I/O) controller. Input/output (I/O) devices are connected to an electronic device, and, for example, a PC card, a network card and the like are I/O devices. One of the signals typically output from such an I/O device is an access wait signal. The access wait signal is a signal which delays access from an electronic device when the I/O device is in a busy state due to processing another job.
The input/output controller included within the electronic device controls a connection between I/O devices and the electronic device.
FIG. 1 is a timing chart of transmission of a normal access wait signal of a conventional input/output (I/O) controller. As shown in FIG. 1, the I/O controller outputs a choice signal (CS) for selecting a particular I/O device among a plurality of I/O devices, and a read/write (RD/WR) signal corresponding to an input/output (I/O) control command. In addition, an internal operation of the I/O controller is comprised of the steps of an IDLE step, a SETUP step, an ACCESS step, an ACCESS DELAY step, a HOLD step, and an IDLE step. The IDLE state represents a state in which the I/O controller is initialized, the SETUP state represents a state in which a start of the internal operation to be performed according to an I/O control command is prepared. The ACCESS state represents a state in which an access to an I/O device is performed according to the I/O control command, an ACCESS DELAY state represents a state in which an access to the I/O device is delayed according to an access wait signal, and a HOLD state represents an intermediate state in which the I/O controller may proceed to another IDLE state after the access is normally finished.
The fact that a normal access wait signal (WAIT) shown in FIG. 1 is at a high level represents that access to an I/O device is possible, and the fact that the normal access wait signal (WAIT) is at a low level represents that access to the I/O device must be delayed. Therefore, as shown in FIG. 1, when the internal operation is changed from the IDLE state to the SETUP state, the choice signal is changed to the low level, and when the internal operation is changed from the SETUP state to the ACCESS state, the RD/WR signal is changed to the low level. Thereafter, when the access wait signal (WAIT) is changed to the low level, access to the I/O device is delayed until the access wait signal (WAIT) is changed to the high level. Then, when the access wait signal (WAIT) is changed to the high level, access is performed for as much time as is remaining out of a preset access time. The remaining access time diminishes according to the length of the access delay. Thereafter, the internal operation returns to the IDLE state via the HOLD state.
FIG. 2 is a timing chart of transmission of an abnormal access wait signal of a conventional I/O controller.
As shown in FIG. 2, when the access wait signal WAIT is not changed from the low level to the high level beyond a predetermined time period due to various factors such as unstableness of hardware, noise, or other unexpected electrical situations, the state of the I/O controller that reaches the ACCESS state via the SETUP state remains in the ACCESS DELAY state indefinitely. Accordingly, the interface signals such as the choice signal, and the RD/WR signal of the I/O controller cannot return to a normal operation, as shown in FIG. 2. As described above, when the electronic device cannot normally operate any more due to an error of the access wait signal, there is a problem in which important data stored in a memory, and functional operations being performed presently in an electronic device are invalidated since the only method to solve such an abnormal operation is to reset the electronic device in a hardware manner.